Circuit test can generally be divided into two classes: functional and structural. With functional test, a test engineer and/or software 1) emulates the stimuli and responses that a circuit might receive/generate at its inputs and outputs during normal use, 2) applies the stimuli to the circuit's inputs, 3) captures responses to the stimuli at the circuit's outputs, and 4) compares the captured responses to the expected responses. With structural test, a circuit's intended function has little or no bearing on the generation of circuit tests. Rather, a circuit is provided with a plurality of storage elements that are linked to form a scan chain about a combinational logic “core”. A circuit test pattern is then shifted into the storage elements; the pattern is launched into the logic core; and a response to the test pattern is then captured via the elements of the scan chain. The captured response is then shifted out of the storage elements and compared to an expected response. By exercising the logic core using a variety of test patterns, one can infer that the structure of the logic core is present and appropriately connected. If the structure of the logic core is present and appropriately connected, one can then infer that it should function as designed. Structural test is therefore advantageous in that one need not emulate nor understand a circuit's function, but need only exercise its logic.
A circuit that is designed for structural test will typically comprise “design-for-test” (DFT) structures. In a simple case, DFT structures may only comprise a plurality of storage elements that are linked to form a scan chain. In more complex cases, DFT structures may comprise storage elements that are linked in multiple scan chains; or DFT structures may comprise built-in self-test (BIST) hardware that 1) generates scan patterns internally to a device under test, and 2) optionally collects responses to scan patterns and compresses them into one or more output signatures.